1. Field of Invention
The present invention relates to the structure of a reflective electrode-side substrate, and a liquid crystal panel containing the reflective electrode-side substrate, and also relates to an electronic apparatus using the liquid crystal panel.
2. Description of Related Art
As a small high-definition active matrix liquid crystal panel suitable for application to a light valve for a projector, and the like, a transmissive liquid crystal panel containing thin film transistors (TFT) formed on a quartz substrate by using polycrystalline and transparent electrodes formed as pixel electrodes on the transistors is conventionally brought into practical use. In the transmissive liquid crystal panel using TFT, the TFT region provided for each of pixels and the wiring region containing a gate electrode and source and drain electrodes for driving the TFT are not transmissive regions for transmitting light. Therefore, such a panel has the fatal defect that as the size of one pixel region decreases due to an increase in resolution of the panel to XGA or SXGA, the aperture ratio decreases.
Therefore, as an active matrix liquid crystal panel which can easily achieve a high aperture ratio as compared with a transmissive active matrix liquid crystal panel, a reflective active matrix liquid crystal panel is proposed which contains pixel electrodes serving as reflective electrodes, and transistors respectively formed below the pixel electrodes.
In the above-described conventional reflective active matrix liquid crystal panel, like the transistors, storage capacitors for holding the voltage applied to the reflective electrodes are also arranged in a different plane region separated from the arrangement region of the transistors below the reflective electrodes. Therefore, in the conventional reflective active matrix liquid crystal panel, the storage capacitor cannot be formed in the arrangement region of the transistor provided in each pixel, and thus the area where the storage capacitors can be arranged decreases as the pixel size (the size of the pixel region) decreases. As a result, the liquid crystal panel has the fault that a sufficient storage capacitor (30 to 100 fF or more, preferably 50 to 100 fF or more) cannot be ensured. When the storage capacitors cannot be ensured, the voltage applied to the reflective electrodes through the transistors during a selection period in which the transistors are conducted is stored in the storage capacitors, but the stored charge is discharged due to the resistance component of a liquid crystal layer and OFF leakage of the transistors during a later non-selection period. As a result, the stored voltage decreases, and thus a stable voltage cannot be continuously applied to the reflective electrodes over the whole non-selection period. If a stable voltage cannot be applied to the reflective electrodes during one vertical scanning (field or frame) period, gray shades cannot be sufficiently obtained, contrast deteriorates, and display quality also deteriorates.
FIG. 2(A) is a sectional view showing the one-pixel portion of the pixel region formed on a reflective electrode-side substrate of a conventional reflective liquid crystal panel containing a semiconductor substrate. FIG. 2(A) is a sectional view taken along broken line A-A' in FIG. 2(B) which is a plan view showing the one pixel portion in the pixel region formed on the reflective electrode-side substrate. In FIG. 2(A), reference numeral 201 denotes a semiconductor substrate, and reference numeral 202 denotes a well region. Reference numeral 203 denotes a field oxide film. Reference numeral 204a denotes a gate insulation film of insulation film layer 204, and reference numeral 204b denotes an insulation film of insulation film layer 204 serving as a dielectric film which constitutes a storage capacitor. Reference numeral 205a denotes a gate electrode to which a scanning signal is applied and reference numeral 205b denotes a polycrystalline or metal silicide layer portion which constitutes a capacitor electrode and is of the same layer as the gate electrode 205a. Reference numerals 206a and 206b denote source and drain regions, respectively, and reference numeral 206c denotes a P-type impurity doped region. Reference numerals 207a and 207b denote first conductive layer portions serving as source and drain electrodes, respectively. Reference numeral 213 denotes a first interlayer insulation film such as a BPSG (Boron Phosphorus Silica Glass) film. Reference numeral 208 denotes a second interlayer insulation film of SiO.sub.2. Reference numeral 209 denotes a second conductive layer. Reference numeral 210 denotes a third interlayer insulation film of SiO.sub.2. Reference numeral 212 denotes a third conductive layer serving as a reflective pixel electrode. Reference numeral 211 denotes a connecting plug for connecting the drain electrode 207b to the pixel electrode 212.
As shown in FIG. 2(A), in the structure of a conventional storage capacitor, the P-type impurity doped region 206c is formed in the region where the field oxide film 203 is not formed on the surface of the substrate, and the capacitor electrode 205b made of polycrystalline or metal silicide is formed on the surface of the P-type impurity doped region 206c through the insulation film 204b. The storage capacitor is formed by the capacitor electrode 205b, the P-type impurity doped region 206c and the insulation film 204b interposed between both regions.
FIG. 2(B) is a plan view showing the one-pixel region of the reflective electrode-side substrate of a conventional reflective liquid crystal panel. In FIG. 2(B), reference numerals denote the same as in FIG. 2(A). The gate electrode 205a is extended in the row direction (scanning direction) of the pixels to form a scanning line for transmitting a scanning signal to the gate electrode of the transistor of the each of the pixels in the scanning direction, and the capacitor electrode 205b in the same layer as the gate electrode 205a is connected to the drain region 206b of the transistor through the drain electrode 207b. The source electrode 207a is extended in the column direction of the pixels to form a data line for successively supplying a data signal to the sources of the transistors of the respective pixels in the column direction. Each of the transistors contains the source region 206a connected to the source electrode (data line) 207a, the drain region 206b, a channel region formed between the source and drain regions on the surface of the substrate, the gate insulation film 204a, and the gate electrode 205a. The drain electrode 207b is connected to the pixel electrode 212 (not shown in FIG. 2(B)) through the connecting plug 211 at an intermediate position of wiring. The insulation film 204b is arranged directly below the capacitor electrode 205b, and the P-type impurity-doped region 206b is formed on the surface of the substrate below the insulation film 204b. The storage capacitor is formed by these films. Therefore, the storage capacitor is capable of storing the voltage of the data signal applied through the transistor in the region shown in FIG. 2(A).
However, as shown in FIG. 2(B), in a conventional example, since the gate electrode 205a and the electrode 205b above the storage capacitor consist of the same layer, both electrodes must be separated in a plane. Namely, since the storage capacitor cannot be formed in the region of each pixel where the transistor is formed, a sufficient storage capacitor value cannot be ensured.